Tag: SPARC

How to obtain a big-endian CPU machine

Last week, I wanted to test whether a trivial function works OK on big-endian CPU. I have ARM and X86_64 machines at hand, but both them are little-endian. After searching online, I come across Running a emulated SparcStation 20 with qemu-sparc, though I heard about qemu before, but never used it, so wanted to give it a spin.

The installation of qemu is straightforward, then I created a NetBSD-10.1-sparc machine in just 3 steps (omit some configurations unneeded for me):

$ qemu-img create -f qcow2 ss20.image 4G
$ qemu-system-sparc -M SS-20 -m 256 -drive file=NetBSD-10.1-sparc.iso,bus=0,unit=2,media=cdrom,readonly=on -drive file=ss20.image,bus=0,unit=0,media=disk -full-screen -boot d
$ qemu-system-sparc -M SS-20 -m 256 -drive file=ss20.image,bus=0,unit=0,media=disk -full-screen -boot c

Then the machine booted successfully and met my requirement perfectly!

C programming tips in SPARC architecture

If you are a newbie of C programmers in SPARC architecture (For example, working on Solaris), you should pay attention to the following tips:

(1) By default, SPARC is big-endian (For Endianness, you can refer http://en.wikipedia.org/wiki/Endianness). It means for an integer (short, int, long, etc), the MSB will be stored in the lower address, while the LSB will be stored in the higher address.

(2) SPARC requires byte-alignment. It means for a short (2 bytes long) variable, the start address of the variable must be the multiples of 2, while a int (4 bytes long) variable, the start address of the variable must be the multiples of 4. If the address can’t satisfy this condition, the application will core dump, and a “Bus Error” will be reported. For this tip, you can refer Expert C Programming: Deep C Secrets (Bus Error section, page 163 ~ page 164).

For more SPARC information, you can refer:
http://en.wikipedia.org/wiki/SPARC;
SPARC Processor Issues.